Invention Grant
US09548304B2 Semiconductor device including gate structure for threshold voltage modulation in transistors and method for fabricating the same
有权
包括用于晶体管中的阈值电压调制的栅极结构的半导体器件及其制造方法
- Patent Title: Semiconductor device including gate structure for threshold voltage modulation in transistors and method for fabricating the same
- Patent Title (中): 包括用于晶体管中的阈值电压调制的栅极结构的半导体器件及其制造方法
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Application No.: US15012344Application Date: 2016-02-01
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Publication No.: US09548304B2Publication Date: 2017-01-17
- Inventor: Yun-Hyuck Ji , Se-Aug Jang , Seung-Mi Lee , Hyung-Chul Kim
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2013-0136842 20131112
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/8238 ; H01L29/51 ; H01L21/28 ; H01L29/49 ; H01L29/10

Abstract:
A method for fabricating a semiconductor device includes forming an NMOS region and a PMOS region in a substrate, forming a first stack layer including a first gate dielectric layer and a first work function layer that is disposed over the first gate dielectric layer and contains aluminum, over the PMOS region of the substrate, forming a second stack layer including a second gate dielectric layer, a threshold voltage modulation layer that is disposed over the second gate dielectric layer and contains lanthanum, and a second work function layer that is disposed over the threshold voltage modulation layer, over the NMOS region of the substrate, and annealing the first stack layer and the second stack layer, thereby forming a first dipole-interface by diffusion of the aluminum in the first gate dielectric layer and a second dipole-interface by diffusion of the lanthanum in the second gate dielectric layer, respectively.
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