An information processing apparatus includes: processors each having a memories and a memory controller that controls the memories; a normality checker that checks whether the processors operate normally when started; a failure detector that finds any failed processor from a result of the check; a fallback unit that falls back a failed processor if any; a redundancy determiner that determines whether the memories are used in a redundancy configuration; a redundancy cancellation determiner that determines, when the memories are determined to be used in the redundant configuration, whether the redundancy configuration of the memories is to be cancelled; and a redundancy canceller that cancels, when the redundancy configuration of the memories is to be cancelled, the redundancy configuration of the memories in at least one processor operating normally.