Invention Grant
US09552255B2 Memory device with parallel odd and even column access and methods thereof
有权
具有并行奇数和偶数列访问的存储器件及其方法
- Patent Title: Memory device with parallel odd and even column access and methods thereof
- Patent Title (中): 具有并行奇数和偶数列访问的存储器件及其方法
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Application No.: US14926834Application Date: 2015-10-29
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Publication No.: US09552255B2Publication Date: 2017-01-24
- Inventor: Kyung-Whan Kim , Dong-Uk Lee
- Applicant: SK hynix Inc.
- Applicant Address: KR Gyeonggi-do
- Assignee: SK Hynix Inc.
- Current Assignee: SK Hynix Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2015-0081145 20150609
- Main IPC: G06F11/10
- IPC: G06F11/10 ; G11C7/10 ; G11C7/22 ; G11C8/18
Abstract:
A memory device includes: a plurality of first lines; a plurality of second lines; a plurality of bank groups each including a predetermined number of banks; and a column signal transmission unit suitable for transmitting one or more column command signals and one or more column address signals to the bank groups through the first lines based on an odd-numbered column command, and transmitting the column command signals and the column address signals to the bank groups through the second lines based on an even-numbered column command.
Public/Granted literature
- US20160365131A1 MEMORY DEVICE WITH PARALLEL ODD AND EVEN COLUMN ACCESS AND METHODS THEREOF Public/Granted day:2016-12-15
Information query
