Invention Grant
US09552323B1 High-speed peripheral component interconnect (PCIe) input-output devices with receive buffer management circuitry
有权
具有接收缓冲器管理电路的高速外设组件互连（PCIe）输入输出设备
- Patent Title: High-speed peripheral component interconnect (PCIe) input-output devices with receive buffer management circuitry
- Patent Title (中): 具有接收缓冲器管理电路的高速外设组件互连（PCIe）输入输出设备
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Application No.: US13936063Application Date: 2013-07-05
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Publication No.: US09552323B1Publication Date: 2017-01-24
- Inventor: Christopher D. Finan , Philippe Molson , Kenny Au , Cora Mau
- Applicant: Altera Corporation
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: G06F13/00
- IPC: G06F13/00 ; G06F13/42
Abstract:
Interface circuitry is provided to control the flow of data transmitted over a high-speed serial link. The interface circuitry may receive data over a high-speed serial link and store the received data in a receive buffer. The receive buffer may be connected to an additional buffer in an application layer module. The application layer module may produce credits based on the processing capacity of the additional buffer and send those credits to the interface circuitry. The interface circuitry may then send these credits over the high speed link.
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