Invention Grant
- Patent Title: Fine patterning methods and methods of fabricating semiconductor devices using the same
- Patent Title (中): 精细构图方法和使用其制造半导体器件的方法
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Application No.: US15141860Application Date: 2016-04-29
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Publication No.: US09553027B2Publication Date: 2017-01-24
- Inventor: Gyeong-seop Kim , Sungbong Kim , Myeongcheol Kim
- Applicant: Samsung Electronics Co., Ltd.
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Myers Bigel, P.A.
- Priority: KR10-2014-0100636 20140805
- Main IPC: H01L21/31
- IPC: H01L21/31 ; H01L21/30 ; H01L21/82 ; H01L21/00 ; H01L21/8234 ; H01L21/306 ; H01L21/308 ; H01L21/311 ; H01L29/66

Abstract:
A fine-patterning method includes forming a mask layer with lower and upper mask layers on an underlying layer, forming a pair of sacrificial patterns on the mask layer, forming a connection spacer between the sacrificial patterns and first spacers that are spaced apart from each other with the pair of sacrificial patterns interposed therebetween and covering side surfaces of the sacrificial patterns, etching the upper mask layer using the first spacers and the connection spacer as an etch mask to form upper mask patterns, forming second spacers to cover side surfaces of the upper mask patterns, etching the lower mask layer using the second spacers as an etch mask to form lower mask patterns, and etching the underlying layer using the lower mask patterns as an etch mask.
Public/Granted literature
- US20160247725A1 FINE PATTERNING METHODS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES USING THE SAME Public/Granted day:2016-08-25
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