Invention Grant
US09553030B2 Method of manufacturing P-channel FET device with SiGe channel
有权
使用SiGe通道制造P沟道FET器件的方法
- Patent Title: Method of manufacturing P-channel FET device with SiGe channel
- Patent Title (中): 使用SiGe通道制造P沟道FET器件的方法
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Application No.: US14695232Application Date: 2015-04-24
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Publication No.: US09553030B2Publication Date: 2017-01-24
- Inventor: Hans-Peter Moll , Peter Baars
- Applicant: GLOBALFOUNDRIES Inc.
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/84
- IPC: H01L21/84 ; H01L21/762 ; H01L21/02 ; H01L29/66 ; H01L29/78 ; H01L21/8238 ; H01L29/786

Abstract:
A method of forming a semiconductor device is provided including providing a semiconductor-on-insulator (SOI) wafer comprising a first semiconductor layer comprising a first material component and formed on a buried oxide (BOX) layer, and forming a channel region of a P-channel transistor device, including forming a second semiconductor layer only over a first portion of the first semiconductor layer, wherein the second semiconductor layer comprises the first material component and a second material component different from the first material component, forming an opening in the first semiconductor layer outside the first portion and subsequently performing a thermal anneal to push the second material component from the second semiconductor layer into the first semiconductor layer.
Public/Granted literature
- US20160315016A1 METHOD OF MANUFACTURING P-CHANNEL FET DEVICE WITH SIGE CHANNEL Public/Granted day:2016-10-27
Information query
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