Invention Grant
US09553068B2 Integrated circuit (“IC”) assembly includes an IC die with a top metallization layer and a conductive epoxy layer applied to the top metallization layer
有权
集成电路（“IC”）组件包括具有顶部金属化层和施加到顶部金属化层的导电环氧树脂层的IC管芯
- Patent Title: Integrated circuit (“IC”) assembly includes an IC die with a top metallization layer and a conductive epoxy layer applied to the top metallization layer
- Patent Title (中): 集成电路（“IC”）组件包括具有顶部金属化层和施加到顶部金属化层的导电环氧树脂层的IC管芯
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Application No.: US14725377Application Date: 2015-05-29
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Publication No.: US09553068B2Publication Date: 2017-01-24
- Inventor: Osvaldo Jorge Lopez , Jonathan Almeria Noquil , Juan Herbsommer
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agency: Tuenlap Daniel Chan
- Agent Frank D. Cimino
- Main IPC: H01L23/495
- IPC: H01L23/495 ; H01L23/00 ; H01L23/28 ; H01L23/498
Abstract:
An integrated circuit (“IC”) assembly includes an IC die with a metallization layer on a top surface thereof. A plurality of lead wires are bonded at first end portions thereof to the metallization layer. A conductive layer is attached to the metallization layer and covers the first ends of the lead wires.
Public/Granted literature
- US20150262965A1 WIRE BONDING METHOD AND STRUCTURE Public/Granted day:2015-09-17
Information query
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