Invention Grant
- Patent Title: Thin film transistor array substrate and a thin film transistor which comprise a conductive structure comprising a blocking layer and a diffusion prevention layer
- Patent Title (中): 薄膜晶体管阵列基板和薄膜晶体管,其包括具有阻挡层和扩散防止层的导电结构
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Application No.: US13877745Application Date: 2012-10-17
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Publication No.: US09553158B2Publication Date: 2017-01-24
- Inventor: Jaemoon Chung , Qiuping Huang , Seong Sil Im , Dongseob Kim , Chao-Huan Hsu , Huawei Xu , Zhengwei Chen , Jianshe Xue
- Applicant: BOE TECHNOLOGY GROUP CO., LTD. , HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.
- Applicant Address: CN Hefei, Anhui CN Beijing
- Assignee: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.,BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee: HEFEI XINSHENG OPTOELECTRONICS TECHNOLOGY CO., LTD.,BOE TECHNOLOGY GROUP CO., LTD.
- Current Assignee Address: CN Hefei, Anhui CN Beijing
- Priority: CN201210096583 20120401
- International Application: PCT/CN2012/083106 WO 20121017
- International Announcement: WO2013/149463 WO 20131010
- Main IPC: H01L23/532
- IPC: H01L23/532 ; H01L29/49 ; H01L21/28 ; H01L27/12 ; H01L29/423 ; H01L29/45 ; H01L21/3205

Abstract:
Embodiments of the invention provide a conductive structure, a thin film transistor, an array substrate, and a display device. The conductive structure comprises a copper layer formed of copper or copper alloy; a blocking layer for preventing copper ions of the copper layer from diffusing outward; and a diffusion prevention layer for preventing exterior ions from diffusing to the copper layer and disposed between the copper layer and the blocking layer. The multilayer conductive structure according to an embodiment of the invention can prevent exterior ions from diffusing into a copper layer and prevent copper ions from diffusing outward to reduce ions diffusion that adversely impacts the electricity performance and chemical corrosion resistance of the copper metal layer, and meanwhile can enhance adhesiveness of the conductive structure, which may be helpful for etching/patterning of the multilayer conductive structure.
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