Invention Grant
- Patent Title: Double gated fin transistors and methods of fabricating and operating the same
- Patent Title (中): 双门控鳍式晶体管及其制造和操作方法
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Application No.: US12950787Application Date: 2010-11-19
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Publication No.: US09553193B2Publication Date: 2017-01-24
- Inventor: Werner Juengling
- Applicant: Werner Juengling
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder, P.C.
- Main IPC: H01L27/118
- IPC: H01L27/118 ; H01L29/78 ; H01L27/108 ; H01L29/66

Abstract:
A semiconductor device is provided that includes a fin having a first upper gate on a sidewall of the fin in a first trench and a second upper gate formed on the opposite sidewall of the fin. The device also includes a first lower gate on the sidewall and a second lower gate on the opposite sidewall, wherein the first upper gate is formed above the first lower gate and the second upper gate is formed above the second lower gate. Methods of manufacturing and operating the device are also included. A method of operation may include biasing the first upper gate and second upper gate to preselect the transistors of a fin and then biasing the first lower gate and second lower gate to operate the transistors of the fin.
Public/Granted literature
- US20120126884A1 DOUBLE GATED FIN TRANSISTORS AND METHODS OF FABRICATING AND OPERATING THE SAME Public/Granted day:2012-05-24
Information query
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