Invention Grant
US09553193B2 Double gated fin transistors and methods of fabricating and operating the same 有权
双门控鳍式晶体管及其制造和操作方法

Double gated fin transistors and methods of fabricating and operating the same
Abstract:
A semiconductor device is provided that includes a fin having a first upper gate on a sidewall of the fin in a first trench and a second upper gate formed on the opposite sidewall of the fin. The device also includes a first lower gate on the sidewall and a second lower gate on the opposite sidewall, wherein the first upper gate is formed above the first lower gate and the second upper gate is formed above the second lower gate. Methods of manufacturing and operating the device are also included. A method of operation may include biasing the first upper gate and second upper gate to preselect the transistors of a fin and then biasing the first lower gate and second lower gate to operate the transistors of the fin.
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