Invention Grant
- Patent Title: Method of manufacturing semiconductor device and structure with trenches in passivation film
- Patent Title (中): 半导体器件制造方法及其在钝化膜中的沟槽结构
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Application No.: US14734155Application Date: 2015-06-09
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Publication No.: US09553217B2Publication Date: 2017-01-24
- Inventor: Masao Ishioka , Nobutaka Ukigaya
- Applicant: CANON KABUSHIKI KAISHA
- Applicant Address: JP Tokyo
- Assignee: CANON KABUSHIKI KAISHA
- Current Assignee: CANON KABUSHIKI KAISHA
- Current Assignee Address: JP Tokyo
- Agency: Fitzpatrick, Cella, Harper & Scinto
- Priority: JP2014-124682 20140617
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L31/0203 ; H01L27/146 ; H01L31/18 ; H01L21/78 ; H01L23/544

Abstract:
A method of manufacturing a semiconductor device is provided. The method includes forming a passivation film on a substrate including a first element region, a second element region adjacent to the first element region in a first direction, a third element region adjacent to the first region in a second direction, and a first scribe region extending to the first direction between the first element region and the third element region, forming a first trench in the passivation film between the first scribe region and the first element region, forming a second trench in the passivation film between the third element region and the first scribe region, and forming a film on the passivation film where the trenches have been formed by coating. The each of trenches is formed continuously along the first and the second element region.
Public/Granted literature
- US20150364510A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE AND STRUCTURE Public/Granted day:2015-12-17
Information query
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