A de-glitch circuit, a de-glitch method and a short circuit protection device are provided. In a period during which a first flag signal is in a first logic state, the de-glitch circuit increases a counting result with a rising rate. In a period during which the first flag signal is in a second logic state, the de-glitch circuit decreases the counting result with a falling rate, wherein the rising rate is greater than the falling rate. The de-glitch circuit sets a logic state of a second flag signal according to a relationship between the counting result and a threshold.