Systems, methods and apparatuses involving a chip-to-chip communication channel, for reducing Far End Crosstalk (FEXT) through the novel concept of controlling FEXT magnitude and polarity of a component inside a channel, vias or within a connector by implementing broadside and edge couplings to offset cumulative FEXT in a channel, via-connector-via subsystem or a connector. The example implementations described herein can be applied to a chip-to-chip communication channel, mezzanine connectors, backplane connectors and any other connectors requiring via routing, and connector itself that can benefit from FEXT reduction.