Invention Grant
US09558998B2 Systems and methods for producing flat surfaces in interconnect structures
有权
用于在互连结构中产生平坦表面的系统和方法
- Patent Title: Systems and methods for producing flat surfaces in interconnect structures
- Patent Title (中): 用于在互连结构中产生平坦表面的系统和方法
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Application No.: US15066238Application Date: 2016-03-10
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Publication No.: US09558998B2Publication Date: 2017-01-31
- Inventor: Cyprian Uzoh , Vage Oganesian , Ilyas Mohammed
- Applicant: Tessera, Inc.
- Applicant Address: US CA San Jose
- Assignee: Tessera, Inc.
- Current Assignee: Tessera, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/4763
- IPC: H01L21/4763 ; H01L21/768 ; H01L21/321 ; H01L23/48

Abstract:
In interconnect fabrication (e.g. a damascene process), a conductive layer is formed over a substrate with holes, and is polished to provide interconnect features in the holes. To prevent erosion/dishing of the conductive layer at the holes, the conductive layer is covered by a sacrificial layer (possibly conformal) before polishing; then both layers are polished. Initially, before polishing, the conductive layer and the sacrificial layer are recessed over the holes, but the sacrificial layer is polished at a lower rate to result in a protrusion of the conductive layer at a location of each hole. The polishing can continue to remove the protrusions and provide a planar surface.
Public/Granted literature
- US20160190000A1 SYSTEMS AND METHODS FOR PRODUCING FLAT SURFACES IN INTERCONNECT STRUCTURES Public/Granted day:2016-06-30
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