Invention Grant
- Patent Title: LDMOS with adaptively biased gate-shield
- Patent Title (中): LDMOS具有自适应偏置的栅极屏蔽
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Application No.: US14574707Application Date: 2014-12-18
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Publication No.: US09559199B2Publication Date: 2017-01-31
- Inventor: George Imthurn , James Ballard , Yashodhan Moghe
- Applicant: Silanna Asia Pte Ltd
- Applicant Address: SG Singapore
- Assignee: Silanna Asia Pte Ltd
- Current Assignee: Silanna Asia Pte Ltd
- Current Assignee Address: SG Singapore
- Agency: The Mueller Law Office, P.C.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/40

Abstract:
An LDFET is disclosed. A source region is electrically coupled to a source contact. A lightly doped drain (LDD) region has a lower dopant concentration than the source region, and is separated from the source region by a channel. A highly doped drain region forms an electrically conductive path between a drain contact and the LDD region. A gate electrode is located above the channel and separated from the channel by a gate dielectric. A shield plate is located above the gate electrode and the LDD region, and is separated from the LDD region, the gate electrode, and the source contact by a dielectric layer. A control circuit applies a variable voltage to the shield plate that: (1) accumulates a top layer of the LDD region before the transistor is switched on; and (2) depletes the top layer of the LDD region before the transistor is switched off.
Public/Granted literature
- US20160181420A1 LDMOS with Adaptively Biased Gate-Shield Public/Granted day:2016-06-23
Information query
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