A display panel includes a timing controller embedded data driver and a first data driver. The timing controller embedded data driver includes an image processing part and an internal data driving part. The image processing part generates a first data signal corresponding to a first display area and a second data signal corresponding to a second display area based on input image data. The internal data driving part generates a second data voltage based on the second data signal to output the second data voltage to the second display area. The first data driver is disposed at a first side of the timing controller embedded data driver. The first data driver receives the first data signal from the timing controller embedded data driver and generates a first data voltage based on the first data signal to output the first data voltage to the first display area.