A semiconductor memory device includes a memory cell, and a control circuit configured to execute a writing operation on the memory cell in response to a write command. The writing operation includes a first operation in which a first initial program voltage is applied and a second operation in which a second initial program voltage higher than the first initial program voltage is applied. The control circuit, in response to a status inquiry command, outputs a first signal when the status inquiry command is received during execution of the first operation, and outputs a second signal which is different from the first signal when the status inquiry command is received during execution of the second operation.