Invention Grant
- Patent Title: Semiconductor structures and methods for multi-level work function
- Patent Title (中): 半导体结构和多级功能的方法
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Application No.: US14469682Application Date: 2014-08-27
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Publication No.: US09564431B2Publication Date: 2017-02-07
- Inventor: Jean-Pierre Colinge , Chia-Wen Liu , Wei-Hao Wu , Chih-Hao Wang , Carlos H. Diaz
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- Main IPC: H01L27/088
- IPC: H01L27/088 ; H01L29/78 ; H01L29/66 ; H01L21/82 ; H01L29/06 ; H01L29/49 ; H01L21/8234 ; H01L21/28 ; H01L29/775 ; H01L21/84 ; H01L29/423

Abstract:
A semiconductor structure is provided comprising a vertical channel structure extending from a substrate and formed as a channel between a source region and a drain region. The semiconductor structure further comprises a metal gate that surrounds a portion of the vertical channel structure. The metal gate has a gate length. The metal gate has a first gate section with a first workfunction and a first thickness. The metal gate also has a second gate section with a second workfunction and a second thickness. The first thickness level is different from the second thickness level and the sum of the first thickness level and the second thickness level is equal to the gate length. The ratio of the first thickness level to the second thickness level for the gate length was chosen to achieve a threshold voltage level for the semiconductor device.
Public/Granted literature
- US20150236086A1 SEMICONDUCTOR STRUCTURES AND METHODS FOR MULTI-LEVEL WORK FUNCTION Public/Granted day:2015-08-20
Information query
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