Invention Grant
- Patent Title: Dual vertical channel
- Patent Title (中): 双垂直通道
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Application No.: US14180394Application Date: 2014-02-14
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Publication No.: US09564487B2Publication Date: 2017-02-07
- Inventor: Ru-Shang Hsiao , Chia-Ming Chang , Huang Jiun-Jie , Ling-Sung Wang
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
- Current Assignee Address: TW Hsin-Chu
- Agency: Cooper Legal Group, LLC
- Main IPC: H01L29/10
- IPC: H01L29/10 ; H01L29/78 ; H01L29/66 ; H01L29/08

Abstract:
Among other things, one or more semiconductor arrangements and techniques for forming such semiconductor arrangements are provided herein. A semiconductor arrangement comprises a first channel region and a second channel region that are formed according to at least one of a vertical channel configuration or a dual channel configuration. The first channel region operates as a first channel between a source region and a drain region of the semiconductor arrangement. The second channel region operates as a second channel between the source region and the drain region. A gate region, formed between the first channel region and the second channel region, operates to control the first channel and the second channel. Performance of the semiconductor arrangement is improved, such as an increase in current, because two current paths between the source region and the drain region are provided by the two channels.
Public/Granted literature
- US20150236094A1 DUAL VERTICAL CHANNEL Public/Granted day:2015-08-20
Information query
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