Invention Grant
US09564575B2 Dual encapsulation integration scheme for fabricating integrated circuits with magnetic random access memory structures
有权
用于制造具有磁性随机存取存储器结构的集成电路的双封装集成方案
- Patent Title: Dual encapsulation integration scheme for fabricating integrated circuits with magnetic random access memory structures
- Patent Title (中): 用于制造具有磁性随机存取存储器结构的集成电路的双封装集成方案
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Application No.: US14586415Application Date: 2014-12-30
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Publication No.: US09564575B2Publication Date: 2017-02-07
- Inventor: Danny Pak-Chum Shum , Hai Cong , Yi Jiang , Juan Boon Tan
- Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Current Assignee Address: SG Singapore
- Agency: Lorenz & Kopf, LLP
- Main IPC: H01L43/08
- IPC: H01L43/08 ; H01L43/12 ; H01L27/22 ; H01L43/02

Abstract:
Integrated circuits with magnetic random access memory (MRAM) and dual encapsulation for double magnesium oxide tunnel barrier structures and methods for fabricating the same are disclosed herein. As an illustration, an integrated circuit includes a magnetic random access memory structure that includes a bottom electrode that has a bottom electrode width and has bottom electrode sidewalls and a fixed layer overlying the bottom electrode that has a fixed layer width that is substantially equal to the bottom electrode width and has fixed layer sidewalls. The MRAM structure of the integrated circuit further includes a free layer overlying a central area of the fixed layer. Still further, the MRAM structure of the integrated circuit includes a first encapsulation layer disposed along the free layer sidewalls and a second encapsulation layer disposed along the bottom electrode sidewalls and the fixed layer sidewalls.
Public/Granted literature
Information query
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