Invention Grant
US09564575B2 Dual encapsulation integration scheme for fabricating integrated circuits with magnetic random access memory structures 有权
用于制造具有磁性随机存取存储器结构的集成电路的双封装集成方案

Dual encapsulation integration scheme for fabricating integrated circuits with magnetic random access memory structures
Abstract:
Integrated circuits with magnetic random access memory (MRAM) and dual encapsulation for double magnesium oxide tunnel barrier structures and methods for fabricating the same are disclosed herein. As an illustration, an integrated circuit includes a magnetic random access memory structure that includes a bottom electrode that has a bottom electrode width and has bottom electrode sidewalls and a fixed layer overlying the bottom electrode that has a fixed layer width that is substantially equal to the bottom electrode width and has fixed layer sidewalls. The MRAM structure of the integrated circuit further includes a free layer overlying a central area of the fixed layer. Still further, the MRAM structure of the integrated circuit includes a first encapsulation layer disposed along the free layer sidewalls and a second encapsulation layer disposed along the bottom electrode sidewalls and the fixed layer sidewalls.
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