Invention Grant
- Patent Title: Asynchronous high-speed programmable divider
- Patent Title (中): 异步高速可编程分频器
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Application No.: US14691738Application Date: 2015-04-21
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Publication No.: US09564904B2Publication Date: 2017-02-07
- Inventor: Jeet Narayan Tiwari , Nitin Gupta
- Applicant: STMicroelectronics International N.V.
- Applicant Address: NL Amsterdam
- Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
- Current Assignee: STMICROELECTRONICS INTERNATIONAL N.V.
- Current Assignee Address: NL Amsterdam
- Agency: Gardere Wynne Sewell, LLP
- Main IPC: H03K21/00
- IPC: H03K21/00 ; H03K23/00 ; H03K21/02 ; H03K23/68 ; H03K23/58 ; H03K23/66

Abstract:
A method of dividing a clock signal by an input signal of N bits with M most significant bits is described herein. The method includes dividing the clock signal by the most significant bits of the input signal 2N-M−1 times out of 2N-M divisions of the clock signal, using a divider. The clock signal is divided by a sum of the most significant bits and the least significant bits one time out of 2N-M divisions of the clock signal, using the divider. The clock signal is also divided by 2N-M, 2N-M times, using the divider.
Public/Granted literature
- US20160315621A1 ASYNCHRONOUS HIGH-SPEED PROGRAMMABLE DIVIDER Public/Granted day:2016-10-27
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