Invention Grant
- Patent Title: Method for manufacturing semiconductor chip
- Patent Title (中): 制造半导体芯片的方法
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Application No.: US15040136Application Date: 2016-02-10
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Publication No.: US09566791B2Publication Date: 2017-02-14
- Inventor: Takeshi Shibata
- Applicant: CANON KABUSHIKI KAISHA
- Applicant Address: JP Tokyo
- Assignee: CANON KABUSHIKI KAISHA
- Current Assignee: CANON KABUSHIKI KAISHA
- Current Assignee Address: JP Tokyo
- Agency: Fitzpatrick, Cella, Harper & Scinto
- Priority: JP2015-035744 20150225
- Main IPC: H01L21/78
- IPC: H01L21/78 ; B41J2/16

Abstract:
There is provided a method for manufacturing semiconductor chips in which the chips as many as possible are arranged on one substrate and these chips can be cut with high accuracy in a relatively simple process. For such occasion on a wafer, short sides of the semiconductor chips are laid out to be inclined at an angle of 5° or less to a crystal orientation of the wafer. Thereafter, a laser stealth dicing method is used to form a plurality of first dicing lines along long sides of the individual semiconductor chips and a plurality of second dicing lines along short sides thereof.
Public/Granted literature
- US20160243833A1 METHOD FOR MANUFACTURING SEMICONDUCTOR CHIP Public/Granted day:2016-08-25
Information query
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