An apparatus includes a plurality of processors and a holder unit. The plurality of processors execute a task as a unit of processing by dividing the task into multiple threads including single and parallel threads, where the single thread is executed by only one of the plurality of processors whose respective pieces of processing have reached the thread, and the parallel thread is executed in parallel with another parallel thread by the plurality of processors. The holder unit is configured to held information to be shared by the plurality of processors. Each processor executes one of the multiple threads at a time, and causes the holder unit to hold reaching-state information indicating an extent to which the multiple threads executed by the plurality of processors have reached the single thread. Each processor determines whether to execute the single thread, based on the reaching-state information held in the holder unit.