Invention Grant
- Patent Title: Identifying noise couplings in integrated circuit
- Patent Title (中): 识别集成电路中的噪声耦合
-
Application No.: US14515497Application Date: 2014-10-15
-
Publication No.: US09569577B2Publication Date: 2017-02-14
- Inventor: Sriram Gupta , Neeraj Jain , Mohit Khajuria
- Applicant: Sriram Gupta , Neeraj Jain , Mohit Khajuria
- Applicant Address: US TX Austin
- Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee: FREESCALE SEMICONDUCTOR, INC.
- Current Assignee Address: US TX Austin
- Agent Charles E. Bergere
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method for determining the sensitivity of an analog output node of a mixed-signal module on a system on a chip (SoC) to noise coupling on the analog input nodes of the mixed-signal module includes (i) selecting an IP block for testing, (ii) selecting the output node, (iii) compiling a list of input nodes for testing, (iv) for each input node of the list, providing excitation signals at different frequencies, (v) for each provided excitation signal, determining the output node's noise sensitivity, and (vi) if any individual and/or cumulative noise sensitivity result exceeds a preset threshold, then modifying the SoC design to take corrective action.
Public/Granted literature
- US20160110487A1 IDENTIFYING NOISE COUPLINGS IN INTEGRATED CIRCUIT Public/Granted day:2016-04-21
Information query