Invention Grant
- Patent Title: Via structure and method for its fabrication
- Patent Title (中): 通过其制造的结构和方法
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Application No.: US14158646Application Date: 2014-01-17
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Publication No.: US09570342B1Publication Date: 2017-02-14
- Inventor: Yuanlin Xie
- Applicant: Altera Corporation
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H01L21/768
- IPC: H01L21/768 ; H01L23/52 ; H01L23/522

Abstract:
In a preferred embodiment of the invention, the via comprises one or more stacks, each stack comprising a seed layer of a first electrically conducting material formed on a smooth surface; a trace of a second electrically material that is electroplated on the seed layer; a column in electrical contact with the trace, the column comprising a third electrically conducting material that is electroplated on the trace; and an insulating material on the substrate and trace, the insulating material having a smooth upper surface in which the column is exposed. Additional vias may be stacked in tiers one on top of the other with the seed layer of one via making non-rectifying electrical contact with the exposed column of the via below it. Methods for forming the via structure are also disclosed.
Information query
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