Invention Grant
US09570458B2 Gate fringing effect based channel formation for semiconductor device
有权
基于栅极边缘效应的半导体器件通道形成
- Patent Title: Gate fringing effect based channel formation for semiconductor device
- Patent Title (中): 基于栅极边缘效应的半导体器件通道形成
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Application No.: US14179316Application Date: 2014-02-12
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Publication No.: US09570458B2Publication Date: 2017-02-14
- Inventor: Youseok Suh , Sung-Yong Chung , Ya-Fen Lin , Yi-Ching Jean Wu
- Applicant: Cypress Semiconductor Corporation
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L27/115 ; H01L29/66 ; H01L29/792

Abstract:
Methods and structures for forming semiconductor channels based on gate fringing effect are disclosed. In one embodiment, a NAND flash memory device comprises multiple NAND strings of memory transistors. Each memory transistor includes a charge trapping layer and a gate electrode formed on the charge trapping layer. The memory transistors are formed close to each other to form a channel between an adjacent pair of the memory transistors based on a gate fringing effect associated with the adjacent pair of the memory transistors.
Public/Granted literature
- US20140159138A1 GATE FRINGINE EFFECT BASED CHANNEL FORMATION FOR SEMICONDUCTOR DEVICE Public/Granted day:2014-06-12
Information query
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