Invention Grant
- Patent Title: Semiconductor structures and methods for multi-level work function
- Patent Title (中): 半导体结构和多级功能的方法
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Application No.: US14852679Application Date: 2015-09-14
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Publication No.: US09570579B2Publication Date: 2017-02-14
- Inventor: Jean-Pierre Colinge , Carlos H. Diaz
- Applicant: Taiwan Semiconductor Manufacturing Company Limited
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
- Current Assignee Address: TW Hsinchu
- Agency: Jones Day
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L29/78 ; H01L29/49 ; H01L29/43 ; H01L21/28 ; H01L29/423 ; H01L29/40 ; H01L29/775 ; H01L29/06 ; H01L29/10

Abstract:
Semiconductor devices that each include a channel region and a gate stack are disclosed. The gate stack includes a gate insulator, a pair of spaced apart first metal gate layers, and a second metal gate layer. The gate insulator extends along the length of the channel region. The first metal gate layers have a first workfunction and extend from the gate insulator. The second metal gate layer is disposed between the first metal gate layers, has a second workfunction different from the first workfunction, and extends from the gate insulator. Methods of fabricating the gate stack are also disclosed.
Public/Granted literature
- US20150380520A1 SEMICONDUCTOR STRUCTURES AND METHODS FOR MULTI-LEVEL WORK FUNCTION Public/Granted day:2015-12-31
Information query
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