Invention Grant
- Patent Title: Method and device for high k metal gate transistors
- Patent Title (中): 高k金属栅极晶体管的方法和器件
-
Application No.: US15002020Application Date: 2016-01-20
-
Publication No.: US09570611B2Publication Date: 2017-02-14
- Inventor: Yong Li , Xiao Na Wang
- Applicant: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
- Applicant Address: CN Shanghai
- Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
- Current Assignee Address: CN Shanghai
- Agency: Kilpatrick Townsend and Stockton LLP
- Priority: CN201510058467 20150204
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L29/78 ; H01L21/8238 ; H01L27/092 ; H01L29/06 ; H01L29/08 ; H01L29/49 ; H01L29/66 ; H01L29/161 ; H01L29/16 ; H01L29/165

Abstract:
A method of manufacturing a semiconductor device includes providing a semiconductor substrate. The semiconductor substrate includes a dummy gate structure formed thereon and an offset spacer formed on a sidewall of the dummy gate structure. The method further includes removing the dummy gate structure to form a gate trench, forming a high-k dielectric layer on the bottom and the sidewall of the gate trench, and forming a cover layer over the high-k dielectric layer. The cover layer has a thickness that is greater at the corners of the bottom of the gate trench than in the middle region of the bottom of the gate trench.
Public/Granted literature
- US20160225903A1 METHOD AND DEVICE FOR HIGH K METAL GATE TRANSISTORS Public/Granted day:2016-08-04
Information query
IPC分类: