Invention Grant
US09571073B2 3D clock distribution circuits and methods 有权
3D时钟分配电路和方法

3D clock distribution circuits and methods
Abstract:
An integrated circuit includes a clock source tier and at least two clock distribution tiers disposed in a vertical stack with the clock source tier. The clock source tier includes a clock circuit. Each of the at least two clock distribution tiers includes a clock distribution circuit. Each clock distribution circuit includes at least one pair of cross-coupled inverters.
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