This invention discloses circuits and methods for generating a pixel clock. The circuits utilize an image signal of a first format to generate a pixel clock, which can be utilized to generate an image signal of a second format. The circuits include a reference clock generation circuit, an image processing circuit, and a clock adjustment circuit. The reference clock generation circuit generates a reference clock. The image processing circuit processes the image signal of the first format to generate a control signal. The clock adjustment circuit, which is coupled to the reference clock generation circuit and the image signal processing circuit, generates the pixel clock according to the reference clock and the control signal. The control signal is substantially a periodic signal, whose frequency is proportional to the frequency of a synchronization signal of the image signal of the second format.