The invention relates to a method and apparatus. In the method, a programmable random access memory testing circuit detects a signal to initiate testing of at least one random access memory circuit, the testing circuit being connected to a bus to which a processor and the at least one memory circuit is connected, the at least one memory circuit comprising at least a first memory block. The testing circuit determines that the bus is not reserved and reserves the bus. The testing circuit reads application data in a first memory block to a temporary memory of the testing circuit. The testing circuit executes marching test for the first memory block in a memory circuit. The testing circuit returns the application data back to the first memory block in the memory circuit. The testing circuit releases the bus.