Invention Grant
US09575892B2 Replaying memory transactions while resolving memory access faults
有权
在解决内存访问故障的同时重新记忆事务
- Patent Title: Replaying memory transactions while resolving memory access faults
- Patent Title (中): 在解决内存访问故障的同时重新记忆事务
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Application No.: US14109678Application Date: 2013-12-17
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Publication No.: US09575892B2Publication Date: 2017-02-21
- Inventor: James Leroy Deming , Jerome F. Duluk, Jr. , John Mashey , Mark Hairgrove , Lucien Dunning , Jonathon Stuart Ramsey Evans , Samuel H. Duncan , Cameron Buschardt , Brian Fahs
- Applicant: NVIDIA CORPORATION
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Artegis Law Group, LLP
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F9/46

Abstract:
One embodiment of the present invention is a parallel processing unit (PPU) that includes one or more streaming multiprocessors (SMs) and implements a replay unit per SM. Upon detecting a page fault associated with a memory transaction issued by a particular SM, the corresponding replay unit causes the SM, but not any unaffected SMs, to cease issuing new memory transactions. The replay unit then stores the faulting memory transaction and any faulting in-flight memory transaction in a replay buffer. As page faults are resolved, the replay unit replays the memory transactions in the replay buffer—removing successful memory transactions from the replay buffer—until all of the stored memory transactions have successfully executed. Advantageously, the overall performance of the PPU is improved compared to conventional PPUs that, upon detecting a page fault, stop performing memory transactions across all SMs included in the PPU until the fault is resolved.
Public/Granted literature
- US20140281263A1 REPLAYING MEMORY TRANSACTIONS WHILE RESOLVING MEMORY ACCESS FAULTS Public/Granted day:2014-09-18
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