Invention Grant
- Patent Title: Hierarchical index bits for multi-sampling anti-aliasing
- Patent Title (中): 用于多采样抗锯齿的分层索引位
-
Application No.: US14488368Application Date: 2014-09-17
-
Publication No.: US09576384B2Publication Date: 2017-02-21
- Inventor: Tomas G. Akenine-Moller
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop Pruner & Hu, P.C.
- Main IPC: G06T11/00
- IPC: G06T11/00 ; G06T1/60 ; G06T11/40

Abstract:
In accordance with some embodiments, a control surface stores the index bits in a tile using multi-sampling anti-aliasing. By determining whether all the samples in a tile point to plane 0, one can use only two bits in a control surface for the tile to indicate that all the samples on the tile point to plane 0. Otherwise more than two bits may be stored in the control surface to indicate planes pointed to by the samples of the tile.
Public/Granted literature
- US20160078586A1 Hierarchical Index Bits for Multi-Sampling Anti-Aliasing Public/Granted day:2016-03-17
Information query
IPC分类:
G | 物理 |
G06 | 计算;推算或计数 |
G06T | 一般的图像数据处理或产生 |
G06T11/00 | 2D〔二维〕图像的生成 |