Invention Grant
US09576798B2 Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers
有权
制造包括具有不同应变状态的晶体管沟道的半导体层的方法以及相关的半导体层
- Patent Title: Method for fabricating semiconductor layers including transistor channels having different strain states, and related semiconductor layers
- Patent Title (中): 制造包括具有不同应变状态的晶体管沟道的半导体层的方法以及相关的半导体层
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Application No.: US14934567Application Date: 2015-11-06
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Publication No.: US09576798B2Publication Date: 2017-02-21
- Inventor: Bich-Yen Nguyen , Walter Schwarzenbach , Christophe Maleville
- Applicant: Soitec
- Applicant Address: FR Bernin
- Assignee: SOITEC
- Current Assignee: SOITEC
- Current Assignee Address: FR Bernin
- Agency: TraskBritt
- Main IPC: H01L21/8238
- IPC: H01L21/8238 ; H01L27/12 ; H01L21/266 ; H01L21/336 ; H01L21/225 ; H01L29/78 ; H01L21/265 ; H01L21/02 ; H01L29/16 ; H01L29/32 ; H01L21/84 ; H01L21/762 ; H01L29/10

Abstract:
Methods of fabricating a semiconductor structure include providing a semiconductor-on-insulator (SOI) substrate including a base substrate, a strained stressor layer above the base substrate, a surface semiconductor layer, and a dielectric layer between the stressor layer and the surface semiconductor layer. Ions are implanted into or through a first region of the stressor layer, and additional semiconductor material is formed on the surface semiconductor layer above the first region of the stressor layer. The strain state in the first region of the surface semiconductor layer above the first region of the stressor layer is altered, and a trench structure is formed at least partially into the base substrate. The strain state is altered in a second region of the surface semiconductor layer above the second region of the stressor layer. Semiconductor structures are fabricated using such methods.
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