Invention Grant
- Patent Title: Semiconductor package and method for manufacturing the same
- Patent Title (中): 半导体封装及其制造方法
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Application No.: US14307734Application Date: 2014-06-18
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Publication No.: US09576849B2Publication Date: 2017-02-21
- Inventor: Ki Yong Lee
- Applicant: SK hynix Inc.
- Applicant Address: KR Icheon-si
- Assignee: SK HYNIX INC.
- Current Assignee: SK HYNIX INC.
- Current Assignee Address: KR Icheon-si
- Agency: William Park & Associates Ltd.
- Priority: KR10-2013-0131880 20131101
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L21/768 ; H01L23/538 ; H01L23/00 ; H01L23/498 ; H01L23/31

Abstract:
The semiconductor package includes semiconductor chips, each chip having one or more bonding pads. The semiconductor chips are stacked in a stepped configuration over the surface of the substrate without covering one or more bonding pads. An encapsulation member encapsulates the stacked semiconductor chips on the surface of the substrate. Via wirings in the encapsulation member electrically connect to a bonding pad of at least one of the semiconductor chips. Redistributions are formed over the encapsulation member such that the one or more redistributions are electrically coupled to the via wirings.
Public/Granted literature
- US20150123288A1 SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2015-05-07
Information query
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