Invention Grant
- Patent Title: Complementary metal oxide semiconductor transistor and fabricating method thereof
- Patent Title (中): 互补金属氧化物半导体晶体管及其制造方法
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Application No.: US14720997Application Date: 2015-05-26
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Publication No.: US09577011B2Publication Date: 2017-02-21
- Inventor: Chung-Tao Chen , Ta-Wei Chiu , Yu-Pu Lin , Yi-Wei Chen
- Applicant: Au Optronics Corporation
- Applicant Address: TW Hsinchu
- Assignee: Au Optronics Corporation
- Current Assignee: Au Optronics Corporation
- Current Assignee Address: TW Hsinchu
- Agency: Jianq Chyun IP Office
- Priority: TW99125379A 20100730
- Main IPC: H01L27/28
- IPC: H01L27/28 ; H01L27/12 ; H01L29/786 ; H01L29/66 ; H01L21/441 ; H01L21/467 ; H01L51/05 ; H01L51/00

Abstract:
A fabricating method of CMOS transistor includes following steps. A first gate and a second gate are formed on a substrate. A gate insulator is formed on the substrate to cover the first and second gates. A first source, a first drain, a second source, and a second drain are formed on the gate insulator. The first source and the first drain are above the first gate. The second source and the second drain are above the second gate. A first channel layer and a mask layer are formed on the gate insulator. The mask layer is on the first channel layer. The first channel layer is above the first gate and contacts with the first source and the first drain. A second channel layer is formed on the gate insulator. The second channel layer is above the second gate and contacts with the second source and the second drain.
Public/Granted literature
- US20150255516A1 COMPLEMENTARY METAL OXIDE SEMICONDUCTOR TRANSISTOR AND FABRICATING METHOD THEREOF Public/Granted day:2015-09-10
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