Invention Grant
- Patent Title: Controlling execution of threads in a multi-threaded processor
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Application No.: US14846900Application Date: 2015-09-07
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Publication No.: US09582324B2Publication Date: 2017-02-28
- Inventor: Khary J. Alexander , Fadi Y. Busaba , Mark S. Farrell , John G. Rell, Jr. , Timothy J. Slegel
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Heslin Rothenberg Farley & Mesiti P.C.
- Main IPC: G06F9/44
- IPC: G06F9/44 ; G06F9/45 ; G06F9/48 ; G06F9/30 ; G06F9/38

Abstract:
Execution of threads in a processor core is controlled. The processor core supports simultaneous multi-threading (SMT) such that there can be effectively multiple logical central processing units (CPUs) operating simultaneously on the same physical processor hardware. Each of these logical CPUs is considered a thread. In such a multi-threading environment, it may be desirous for one thread to stop other threads on the processor core from executing. This may be in response to running a critical sequence or other sequence that needs the processor core resources or is manipulating processor core resources in a way that other threads would interfere with its execution.
Public/Granted literature
- US20160117192A1 CONTROLLING EXECUTION OF THREADS IN A MULTI-THREADED PROCESSOR Public/Granted day:2016-04-28
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