A column access control circuit for generating column write enable outputs with redundancy steering control and bit write control for an integrated circuit chip, and an integrated circuit chip having the same. A column access control circuit may include: a column write enable driver, a redundancy steering logic, and a bit write controller. The column write enable driver may produce column write enable outputs through an output. The column write enable driver is configured to receive certain column interleave write enable and enable column write according to the column interleave write enable received. The redundancy steering logic is configured to receive one or more fuses and skip a damaged column indicated by a corresponding fuse. The bit write controller is configured to receive one or more bit write and provide bit write control according to the one or more bit write received.