Invention Grant
US09588528B2 Inrush current suppression circuit and method for controlling when a load may be fully energized
有权
浪涌电流抑制电路和负载控制何时可以完全通电的方法
- Patent Title: Inrush current suppression circuit and method for controlling when a load may be fully energized
- Patent Title (中): 浪涌电流抑制电路和负载控制何时可以完全通电的方法
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Application No.: US14557113Application Date: 2014-12-01
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Publication No.: US09588528B2Publication Date: 2017-03-07
- Inventor: Paul Schwerman
- Applicant: HONEYWELL INTERNATIONAL INC.
- Applicant Address: US NJ Morris Plains
- Assignee: HONEYWELL INTERNATIONAL INC.
- Current Assignee: HONEYWELL INTERNATIONAL INC.
- Current Assignee Address: US NJ Morris Plains
- Agency: Lorenz & Kopf, LLP
- Main IPC: G05F1/56
- IPC: G05F1/56 ; G05F1/46 ; H02H9/02 ; G05F1/565 ; H02H9/00

Abstract:
A circuit and method for controlling when a load may be fully energized includes directing electrical current through a current limiting resistor that has a first terminal connected to a source terminal of a field effect transistor (FET), and a second terminal connected to a drain terminal of the FET. The gate voltage magnitude on a gate terminal of the FET is varied, whereby current flow through the FET is increased while current flow through the current limiting resistor is simultaneously decreased. A determination is made as to when the gate voltage magnitude on the gate terminal is equal to or exceeds a predetermined reference voltage magnitude, and the load is enabled to be fully energized when the gate voltage magnitude is equal to or exceeds the predetermined reference voltage magnitude.
Public/Granted literature
- US20160154414A1 INRUSH CURRENT SUPPRESSION CIRCUIT AND METHOD FOR CONTROLLING WHEN A LOAD MAY BE FULLY ENERGIZED Public/Granted day:2016-06-02
Information query
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