Invention Grant
US09589899B2 Semiconductor device having a gate cutting region and a cross-coupling pattern between gate structures 有权
具有栅极切割区域和栅极结构之间的交叉耦合图案的半导体器件

Semiconductor device having a gate cutting region and a cross-coupling pattern between gate structures
Abstract:
In a semiconductor device, a first gate structure having a first end portion is formed on a substrate. A second gate structure is formed on the substrate, and has a second end portion opposite to the first end portion of the first gate structure in a diagonal direction. A cross-coupling pattern is formed between the first and second gate structure, and electrically connects the first and second gate structures to each other. A first contact plug directly contacts an upper portion of the first end portion of the first gate structure and a first upper sidewall of the cross-coupling pattern. A second contact plug directly contacts an upper portion of the second end portion of the second gate structure and a second upper sidewall of the cross-coupling pattern. In the semiconductor device, a parasitic capacitance due to the cross-coupling structure may decrease.
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