Invention Grant
- Patent Title: Device for generating test pattern
- Patent Title (中): 用于生成测试模式的设备
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Application No.: US14587399Application Date: 2014-12-31
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Publication No.: US09594115B2Publication Date: 2017-03-14
- Inventor: Yoshiyuki Kurokawa
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Fish & Richardson P.C.
- Priority: JP2014-002134 20140109
- Main IPC: G01R31/02
- IPC: G01R31/02 ; G01R31/317 ; G01R31/3183 ; G01R31/3187 ; H01L21/00

Abstract:
A device that is capable of generating a new test pattern after the design phase and has a small area of a circuit not in use during normal operation includes a first circuit and a second circuit. The second circuit includes a third circuit and fourth circuit. The fourth circuit has a function of storing data for determining the configuration of the third circuit. When a test for the operating state of the first circuit is performed, the second circuit has a function of generating a signal for the test. When the test is not performed, the second circuit has a function of storing data used for processing in the first circuit and a function of comparing a plurality of signals.
Public/Granted literature
- US20150192641A1 DEVICE Public/Granted day:2015-07-09
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