According to one embodiment, a semiconductor memory device includes a semiconductor substrate, a plurality of insulating layers, a plurality of first interconnection layers, a plurality of second interconnection layers, a plurality of memory cells, and a resistance change film. The insulating layers and first interconnection layers are arranged in parallel with the semiconductor substrate. The second interconnection layers are arranged so as to intersect the first interconnection layers. The second interconnection layers are arranged perpendicular to the semiconductor substrate. The memory cells are arranged at intersections of the first and second interconnection layers. Each of the memory cells includes the resistance change film arranged between the first and second interconnection layers. The side of the first interconnection layer in contact with the resistance change film is retreated more in a direction to separate from the second interconnection layer than the side of the insulating layer.