Invention Grant
- Patent Title: Electronic component package and method for manufacturing same
- Patent Title (中): 电子元件封装及其制造方法
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Application No.: US14422990Application Date: 2013-12-20
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Publication No.: US09595651B2Publication Date: 2017-03-14
- Inventor: Yoshihisa Yamashita , Seiichi Nakatani , Koji Kawakita , Susumu Sawada
- Applicant: Panasonic Intellectual Property Management Co., Ltd.
- Applicant Address: JP Osaka
- Assignee: Panasonic Intellectual Property Management Co., Ltd.
- Current Assignee: Panasonic Intellectual Property Management Co., Ltd.
- Current Assignee Address: JP Osaka
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2012-279969 20121221
- International Application: PCT/JP2013/007503 WO 20131220
- International Announcement: WO2014/097643 WO 20140626
- Main IPC: H01L23/02
- IPC: H01L23/02 ; H01L21/00 ; H01L33/64 ; H01L33/58 ; H01L33/62 ; H01L33/56 ; C23C14/34 ; C23C14/58 ; H01L21/768

Abstract:
A method for manufacturing an electronic component package comprises: (i) preparing a metal foil having opposed principal surface “A” for placement of an electronic component and principal surface “B”, and a through-hole located in an electronic component-placement region of surface “A”; (ii) placing the electronic component on the metal foil such that the electronic component is positioned in the electronic component-placement region, and an opening of the through-hole is capped with an electrode of the electronic component; (iii) forming a sealing resin layer on surface “A” such that the electronic component is covered with the sealing resin layer; and (iv) forming a metal plating layer on surface “B”. A dry plating process and a wet plating process are performed to form the metal plating layer in step (iv) such that the through-hole is filled with the metal plating layer, and the metal foil and the metal plating layer are integrated.
Public/Granted literature
- US20150236233A1 ELECTRONIC COMPONENT PACKAGE AND METHOD FOR MANUFACTURING SAME Public/Granted day:2015-08-20
Information query
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