Invention Grant
- Patent Title: Secure boot using a field programmable gate array (FPGA)
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Application No.: US14201016Application Date: 2014-03-07
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Publication No.: US09600291B1Publication Date: 2017-03-21
- Inventor: Sean R. Atsatt
- Applicant: Altera Corporation
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agency: Fletcher Yoder, P.C.
- Main IPC: G06F21/00
- IPC: G06F21/00 ; G06F12/14 ; G06F9/44 ; G06F21/62 ; G06F21/57 ; H04L9/00

Abstract:
This disclosure describes techniques for ensuring security in an integrated circuit system that includes a processor subsystem and a configurable-logic (e.g., FPGA) subsystem, which is capable of storing code executed by the processor. Techniques for utilizing the configurable-logic to control the process of booting a processor in the processor subsystem securely are described. Because the configurable-logic may be on the same die as the processor in the integrated circuit, the configurable-logic may securely boot the processor inside the security boundary of the package containing the die.
Information query