Invention Grant
- Patent Title: Laminated-type inductance device
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Application No.: US14672774Application Date: 2015-03-30
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Publication No.: US09601253B2Publication Date: 2017-03-21
- Inventor: Tomoya Yokoyama , Shigetoshi Hayashi
- Applicant: Murata Manufacturing Co., Ltd.
- Applicant Address: JP Kyoto
- Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee: MURATA MANUFACTURING CO., LTD.
- Current Assignee Address: JP Kyoto
- Agency: Pearne & Gordon LLP
- Priority: JP2012-242156 20121101
- Main IPC: H01F17/04
- IPC: H01F17/04 ; H01F5/00 ; H01F27/28 ; H01F27/24 ; H01F17/00 ; H01F3/14

Abstract:
Provided is a laminated-type inductance device capable of reducing the number of layers for sandwiching a non-magnetic body layer and enhancing direct-current superposition characteristics without intentionally providing a space. In a conductive pattern, portions of the outer circumferential section thereof adjacent to end surface electrodes are respectively recessed toward the inside of the pattern when viewed from above. In other words, line widths are narrower at the above portions. Further, non-magnetic paste is formed between the end surface electrode and the outer circumferential section of the conductive pattern at each of the portions where the line width is narrower. By applying the non-negative paste in a space between the conductive pattern and the end surface electrode, the portion where the non-magnetic paste is applied has the same function as in a case where the non-magnetic ferrite layer is inserted therein.
Public/Granted literature
- US20150206643A1 LAMINATED-TYPE INDUCTANCE DEVICE Public/Granted day:2015-07-23
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