Invention Grant
- Patent Title: Method of forming pattern for semiconductor device
-
Application No.: US14627591Application Date: 2015-02-20
-
Publication No.: US09601344B2Publication Date: 2017-03-21
- Inventor: Chia-Ying Lee , Chih-Yuan Ting , Jyu-Horng Shieh , Ming-Hsing Tsai , Syun-Ming Jang
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/308
- IPC: H01L21/308 ; H01L21/033 ; H01L21/311 ; H01L21/32

Abstract:
The present disclosure provides a method including providing a semiconductor substrate and forming a first layer and a second layer on the semiconductor substrate. The first layer is patterned to provide a first element, a second element, and a space interposing the first and second elements. Spacer elements are then formed on the sidewalls on the first and second elements of the first layer. Subsequently, the second layer is etched using the spacer elements and the first and second elements as a masking element.
Public/Granted literature
- US20150187591A1 METHOD OF FORMING PATTERN FOR SEMICONDUCTOR DEVICE Public/Granted day:2015-07-02
Information query
IPC分类: