Invention Grant
- Patent Title: Method for manufacturing semiconductor device
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Application No.: US14448041Application Date: 2014-07-31
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Publication No.: US09601591B2Publication Date: 2017-03-21
- Inventor: Shunpei Yamazaki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office
- Agent Eric J. Robinson
- Priority: JP2013-165779 20130809; JP2013-165851 20130809; JP2013-165852 20130809
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L29/49 ; H01L29/66 ; H01L29/786

Abstract:
To provide a transistor in which a channel is formed in an oxide semiconductor and which has stable electrical characteristics. To suppress shift in threshold voltage of a transistor in which a channel is formed in an oxide semiconductor. To provide a normally-off switching element having a positive threshold voltage as an n-channel transistor in which a channel is formed in an oxide semiconductor. A base insulating layer is formed over a substrate, an oxide semiconductor layer is formed over the base insulating layer, a first gate insulating layer is formed over the oxide semiconductor layer, a second gate insulating layer is formed over the first gate insulating layer by a sputtering method or an atomic layer deposition method at a substrate temperature of higher than or equal to 100° C., and a gate electrode layer is formed over the second gate insulating layer.
Public/Granted literature
- US20150041802A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2015-02-12
Information query
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