Invention Grant
- Patent Title: Back power protection circuit
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Application No.: US14483649Application Date: 2014-09-11
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Publication No.: US09601916B2Publication Date: 2017-03-21
- Inventor: Amit Kumar Srivastava , Karthik Ns , Raghavendra Devappa Sharma , Dharmaray Nedalgi , Prasad Bhilawadi
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Green, Howard, & Mughal, LLP
- Main IPC: G06K19/00
- IPC: G06K19/00 ; H02H3/18
Abstract:
Described is an apparatus which comprises: one or more signal lines; a transceiver coupled to the one or more signal lines; and a bias generation circuit to provide one or more bias voltages for the transceiver to tri-state the transceiver according to signal attributes of the one or more signal lines.
Public/Granted literature
- US20160079747A1 BACK POWER PROTECTION CIRCUIT Public/Granted day:2016-03-17
Information query
