Invention Grant
- Patent Title: Parametric test program generator
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Application No.: US14445843Application Date: 2014-07-29
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Publication No.: US09606178B2Publication Date: 2017-03-28
- Inventor: Uwe Peter Schiessl , Shannon Anthony Wilmes , Istvan Bauer
- Applicant: Texas Instruments Incorporated , Texas Instruments Deutschland GmbH
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Tuenlap D. Chan; Charles A. Brill; Frank D. Cimino
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G01R31/3183

Abstract:
A method of probing wafers includes providing a processor running a parametric test program generator algorithm which execute steps including reading a stored first probe program including a first test sequence (TS1) having a first tests configured for probing at least a first circuit element (FCE) in a first scribe line module. TS1 includes (i) electrical pinning and geometrical data and (ii) first Variable Group data specific for the FCE including first test parameters having at least first forcing conditions. The (ii) is modified with modified second variable group data specific to a second circuit element (SCE) in a second scribe line module. The modified second Variable Group data includes modified second test parameters having second forcing conditions. (i) of TS1 is merged with the modified second Variable Group data to generate code for a second test sequence of a second probe program that is configured for probing the SCE.
Public/Granted literature
- US20150253380A1 PARAMETRIC TEST PROGRAM GENERATOR Public/Granted day:2015-09-10
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