Invention Grant
- Patent Title: Circuit-level abstraction of multigate devices using two-dimensional technology computer aided design
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Application No.: US14993221Application Date: 2016-01-12
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Publication No.: US09607684B2Publication Date: 2017-03-28
- Inventor: Rajiv V. Joshi , Keunwoo Kim
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Mercedes Hobson
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G11C11/417
Abstract:
A method for predicting a condition in a circuit under design includes obtaining a set comprising first static noise margin curve for the circuit and a second static noise margin curve for the circuit, wherein the second static noise margin curve is complementary to the first static noise margin curve, matching the set to a two-dimensional model of a cell, and predicting the condition in accordance with hardware characterization data corresponding to the cell.
Public/Granted literature
- US20160125933A1 CIRCUIT-LEVEL ABSTRACTION OF MULTIGATE DEVICES USING TWO-DIMENSIONAL TECHNOLOGY COMPUTER AIDED DESIGN Public/Granted day:2016-05-05
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