Invention Grant
- Patent Title: Semiconductor device with biased feature
-
Application No.: US14738407Application Date: 2015-06-12
-
Publication No.: US09607835B2Publication Date: 2017-03-28
- Inventor: Chia-Chu Liu , Min-Chang Liang , Mu-Chi Chiang , Kuei-Shun Chen
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Haynes and Boone, LLP
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L21/033 ; H01L29/423 ; H01L29/51 ; H01L21/28 ; H01L21/308 ; H01L21/3213 ; H01L29/66 ; H01L29/78 ; H01L27/108
Abstract:
A transistor including a gate structure with a first portion and a second portion; the first and second portions each have a first edge and an opposing second edge that are substantially collinear. The gate structure also includes an offset portion interposing the first portion and the second portion. The offset portion has a third edge and an opposing fourth edge. The third edge and the fourth edge are non-collinear with the first and second edges of the first and second portions of the gate structure. For example, the offset portion is offset or shifted from the first and second portions.
Public/Granted literature
- US20150357460A1 SEMICONDUCTOR DEVICE WITH BIASED FEATURE Public/Granted day:2015-12-10
Information query
IPC分类:
